Memory chip

The CAT25256 is an EEPROM serial 256-Kb SPI device internally organized as 32kx8 bits. It has a 64-byte page write cache and supports the Serial Peripheral Interface (SPI) protocol. The device is enabled through a chip select (CS) input. Additionally, the required bus signals are the clock input (SCK), data input (SI) and data output (SO) lines. The hold input can be used to suspend any serial communication with the CAT25256 device. The device features software and hardware write protection, including partial and full array protection. On-chip ECC (Error Correction Code) makes the device suitable for high-reliability applications. Available for new products (Rev. E).

I2C interface with 32Kb EEPROM integrated hardware AES encryption and decryption

LPDDR3

2M (256K × 8bit) SPI interface 1.8V ~ 3.6V